1. Field of the Invention
The present invention relates to a semiconductor chip to be applied to a chip-on-chip structure in which semiconductor chips are bonded to each other in a stacked relation and a flip-chip-bonded structure in which a semiconductor chip is bonded to a printed circuit board in a face-to-face relation. The invention further relates to a production method for such a semiconductor chip. The invention still further relates to a semiconductor device having a semiconductor chip bonded to a solid device (another semiconductor chip or an interconnection board).
2. Description of Related Art
For size reduction and higher integration of a semiconductor device, a so-called chip-on-chip structure, for example, is employed in which a plurality of semiconductor chips are bonded to one another in a face-to-face stacked relation.
In the chip-on-chip structure, as shown in FIG. 25, semiconductor chips 91, 92 opposed to each other are spaced a predetermined distance from each other and electrically connected to each other by a plurality of bumps 93 provided therebetween. The semiconductor chips 91, 92 thus stacked are sealed with a mold resin 94.
When the semiconductor chips 91, 92 are sealed with the mold resin 94, a relatively great pressure is applied to the semiconductor chips by the mold resin 94. Where the semiconductor chips 91, 92 are different in thermal expansion coefficient, strains occur in the semiconductor chips 91, 92 due to stresses exerted thereon when a relatively great amount of heat is applied thereto at the resin sealing. Thus, portions of the semiconductor chips 91, 92 not supported by the bumps 93 are deformed, resulting in deterioration of the characteristics of devices formed in the semiconductor chips 91, 92.
For electrical connection between the semiconductor chips 91 and 92, at least one of surface protective films covering the semiconductor chips is formed with openings through which portions of internal interconnections are exposed, and the bumps 93 are provided on the exposed portions of the internal interconnections. Therefore, the arrangement of the bumps 93 is restricted by the pattern of the internal interconnections and, in some cases, the bumps 93 are unevenly disposed on the surface of the semiconductor chip in accordance with the internal interconnection pattern. Where the bumps 93 are unevenly disposed on the surface thereof, for example, the chip 92 may be tilted on the underlying chip 91.
When the chips 91, 92 are bonded to each other, great stresses are exerted on bump connections. Therefore, the semiconductor substrate provided with the bumps 93 may suffer from a mechanical damage. For prevention of the damage, an attempt has been made to absorb the stresses by utilizing the resilient property of the electrical connection bumps. However, the absorption of the stresses is in sufficient, so that the substrate is damaged. This results in a lower yield.
Further, the substrate often suffers from warpage due to heat applied thereto at mounting of the semiconductor device, so that great stresses are exerted on the bump connections.
The aforesaid problems are associated not only with the semiconductor device of chip-on-chip structure, but also with a semiconductor device of so-called flip-chip-bonded structure in which a semiconductor chip is bonded to a printed circuit board in a face-to-face opposed relation.